The field of this invention includes computers, and particularly relates to the input and output (IO) system of a computer which has a plurality of parallel channels, each consisting of special-purpose processor, together with necessary hardware. Each channel operates to transfer information between the main storage of the computer and one or more I/O devices. The invention concerns the testing of one channel using the facilities of another channel.
In IBM Systems that implement one or more of the following architectures: System/360; System/370; System/370-XA; and Enterprise Systems Architecture 370, I/O operations are conducted through a channel to transfer information between the main storage of the computer and one or more inputing, outputing, and off-line storage devices. The term "channel" is understood to apply to all such systems. In each of these systems, a channel represents a "plug" to which a control unit linking one or more I/O devices can be connected to exchange information with main storage. For an understanding of channel operation and structure, see "IBM System/360 and System/370 I/O Interface Channel to Control Unit Original Equipment Manufacturers' Information", GA22-6974-09, Tenth Edition, February 1988.
In FIG. 1, a pair of prior art channels are shown occupying a channel interface adapter (CIA) 10. The first channel is denoted as channel A, the second is channel B. Each channel provides an external interface to a respective one of I/O control units (CU) 12 and 14. Each control unit serves as a primary interface for plurality of I/O units, such as units 16 and 18. Each of the control units 12 and 14 is linked with a respective channel in the CIA 10 by a bidirectional data/control interface. The interfaces in FIG. 1 are multi-conductor cables 20 and 21.
Each of the channels in the CIA 10 is linked to a shared channel processor (SHCP) 28 and a channel data buffer (CDB) 30. The connection with the shared channel processor 28 is by way of a bi-directional, m-path control signal interface 31. CDB 30 is connected to channels A and B by way of a bi-directional, n-path data bus 32.
FIG. 1 is representative of the basic complement of prior art channel technology. The SHCP 28 is a sophisticated multi-processor capable of conducting a plurality of concurrently-executing transfer processes through a plurality of channels in a plurality of CIA's. The CDB 30, likewise has provision for serving a plurality of channels on a plurality of CIA's.
With the channel structure illustrated in FIG. 1, a process (PROCESS) 35 executing in a CPU 37, can cause the transfer of data either from or to a main storage 39 by providing an I/O instruction to the SHCP 28. The instruction initiates an I/O process in the SHCP 28 which is conducted through a channel, for example, one of the channels A or B. The I/O process causes the addressed channel to execute an initial selection sequence to select an I/O device, send a command to the selected I/O device and retreive initial status from the selected I/O device. The I/O process also establishes the direction of information flow and the possible modes of information transfer the channel can support; the actual mode of information transfer is establsihed later when the actual data transfer is started. After completion of the initial selection sequence, as indicated by the selected I/O device returning zero initial status, data is transferred between the CDB 30 and an I/O device through a selected channel.
A complete test of the hardware of a channel, including data transfers at rated speed, requires the attachment of a control unit. Such a test is usually executed during the final steps of the manufacturing process. In FIG. 2, a maintenance control unit (MCU) 41 is linked by a maintenance cable 43 to channel A for testing. In the prior art, the MCU 41 undertakes a predetermined I/O diagnostic transfer sequence with the channel to which it is connected. Thus, conducting a diagnostic analysis of a failure of channel A requires provision of stand-by equipment in the form of MCU 41. As is known, the MCU 41 is large, expensive, and located at the manufacturing site. Therefore, comprehensive testing can only be done at the plant and not where channel equipment is installed. Consequently, use of the MCU is time-consuming, costly, and inconvenient.